IntSemi Technologies Private Limited - Bangalore, Karnataka - Responsible for PD Implementation of complex ASIC/ SoCs Floorplan, Place & Route, SI Avoidance/ fixing, power/ clock distribution, timing closure - timing, power, clock and noise analysis and DRC/ LVS Job Requirements: 3- 8 Years of Experience in Physical Design BE/ BTECH/ ME/ MTECH in EC/ EE/ CS or related field Must have successful track record taping out complex chips (min 2M gates) Prior experience in design timing closure, Clock/ Power distribution and analysis, RC Extraction, P & R Hands on experience in running STA & Synthesis Should be a power user of P&R and analysis tools fro... - Permanent - Full-time
source http://jobviewtrack.com/en-in/job-48184169481706094954650d0f0800020052076a391b5358544e4c084f2a4207490406632a02164913066b36444c544348011d1d2524481a1b080d0609214c5b5e4413/2998144df4fdcb70f1a978aa596ec67f.html?affid=aec4b202b3e7b41b
No comments:
Post a Comment